ABSTRACTSurface conditioning issues arising from pattern transfer utilizing plasma etching are discussed. Two situations are considered: one in which an oxide on a silicon substrate is exposed to a plasma etching environment and one in which a silicon substrate is exposed to a plasma etching environment. Both situations can lead to the need for surface conditioning and, in some cases, even 950°C, 30 min. furnace anneals or 1050°C, 26 sec. rapid thermal anneals can fail to restore surface and near-surface properties.
