JHDL implementation of a BIST scheme for testing the look-up tables of SRAM based FPGAs Proceedings Paper (Web of Science)

cited authors

  • Niamat, M.; Santhanam, S.; Kim, J.; DucoudrayAcevedo, GO; Garcia, RP; Cedeno, MJ

publication date

  • January 1, 2006

webpage

start page

  • 327

end page

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