BIST for embedded SRAMs in system on chips

Proceedings Paper (Web of Science)

• cited authors: Niamat, MY; Ravinuthala, AS; Jamali, MM; Vemuru, SR; Yang, LT; Arabnia, HR; Becker, J; Imai, M; Salcic, Z
• authors: Niamat, Mohammed Y
• publication date: January 1, 2005
• webpage: Web of Science
• published in: ESA '05: PROCEEDINGS OF THE 2005 INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS AND APPLICATIONS Conference (Web of Science)

author keyword

• SOC
• built-in-self-test
• memory array test
• non-traditional memory faults
• read-sensitive faults

• category: COMPUTER SCIENCE, SOFTWARE ENGINEERING Category
• start page: 74
• end page: 80